1. Field
Exemplary embodiments of the present invention relate to a complementary metal-oxide-semiconductor (CMOS) image sensor (CIS) and, more particularly, to an improved pixel output level control device and a CMOS image sensor using the same.
2. Description of the Related Art
When the size of a pixel array of a CMOS image sensor is increased, one row line readout time required for satisfying a predetermined frame rate (e.g., 30 frames per second (FPS)) is decreased, which makes it difficult to secure a sufficient transfer time for a pixel signal. Furthermore, the increase in size of the pixel array increases the loading capacitance of a pixel output line. Thus, the time during which a pixel signal outputted from a pixel is transferred to an input terminal of a readout device is inevitably increased.
For this reason, when the time during which a pixel signal outputted from a pixel is transferred to the input terminal of the readout device is not sufficiently secured, the pixel signal may not be settled. When the pixel signal is not settled, an image quality may be degraded. That is, since each column line has a slightly different loading capacitance and each pixel bias circuit has a slightly different size, fixed pattern noise (FPN) may occur across the column lines in case where the pixel signal is not settled, thereby degrading an image quality. Since the FPN is visually outstanding, the FPN must be eliminated.